Invention Grant
US07807536B2 Low resistance gate for power MOSFET applications and method of manufacture
有权
功率MOSFET应用的低电阻门和制造方法
- Patent Title: Low resistance gate for power MOSFET applications and method of manufacture
- Patent Title (中): 功率MOSFET应用的低电阻门和制造方法
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Application No.: US11467997Application Date: 2006-08-29
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Publication No.: US07807536B2Publication Date: 2010-10-05
- Inventor: Sreevatsa Sreekantham , Ihsiu Ho , Fred Session , Kent Naylor
- Applicant: Sreevatsa Sreekantham , Ihsiu Ho , Fred Session , Kent Naylor
- Applicant Address: US ME South Portland
- Assignee: Fairchild Semiconductor Corporation
- Current Assignee: Fairchild Semiconductor Corporation
- Current Assignee Address: US ME South Portland
- Agency: Townsend and Townsend and Crew LLP
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
A trench gate field effect transistor is formed as follows. A trench is formed in a semiconductor region, followed by a dielectric layer lining sidewalls and bottom of the trench and extending over mesa regions adjacent the trench. A conductive seed layer is formed in a bottom portion of the trench over the dielectric layer. A low resistance material is grown over the conductive seed layer, wherein the low resistance material is selective to the conductive seed layer.
Public/Granted literature
- US20070190728A1 LOW RESISTANCE GATE FOR POWER MOSFET APPLICATIONS AND METHOD OF MANUFACTURE Public/Granted day:2007-08-16
Information query
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