Method of forming bit line of flash memory device

Invention Grant

US07807565B2 Method of forming bit line of flash memory device 有权

Title translation: 形成闪存器件位线的方法

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Patent Title: Method of forming bit line of flash memory device
Patent Title (中): 形成闪存器件位线的方法
Application No.: US11439527

Application Date: 2006-05-22
Publication No.: US07807565B2

Publication Date: 2010-10-05
Inventor: Woo Yung Jung , Tae Kyung Kim , Eun Soo Kim
Applicant: Woo Yung Jung , Tae Kyung Kim , Eun Soo Kim
Applicant Address: KR Icheon-si
Assignee: Hynix Semiconductor Inc.
Current Assignee: Hynix Semiconductor Inc.
Current Assignee Address: KR Icheon-si
Agency: Townsend and Townsend and Crew LLP
Priority: KR10-2005-0043250 20050523
Main IPC: H01L21/4763
IPC: H01L21/4763 ; H01L23/12

Method of forming bit line of flash memory device

Abstract:

A method for forming a semiconductor device includes forming drain contact holes in a first interlayer insulating layer provided over a semiconductor substrate. First metal material is formed over the first interlayer insulating layer and fills the drain contact holes. A first metal layer formed by patterning the first metal material includes first lines and landing pads. Trenches formed in a second interlayer insulating layer formed over the patterned first metal material expose the landing pads. A second metal layer is formed by providing second metal material over the second interlayer insulating layer and filling the trenches. The second metal layer includes second lines within the trenches that contact the landing pads. The first and second metal layers define a first metal level of the semiconductor device. The first lines define odd-number lines of the first metal level, and the second lines define even-number lines of the first metal level.

Abstract(Chinese):

一种形成半导体器件的方法包括在设置在半导体衬底上的第一层间绝缘层中形成漏极接触孔。第一金属材料形成在第一层间绝缘层上并填充漏极接触孔。通过图案化第一金属材料形成的第一金属层包括第一线和着陆焊盘。形成在图案化的第一金属材料上的第二层间绝缘层中形成的沟槽露出着陆焊盘。通过在第二层间绝缘层上提供第二金属材料并填充沟槽来形成第二金属层。第二金属层包括沟槽内的接触着陆焊盘的第二线。第一和第二金属层限定半导体器件的第一金属层。第一行定义第一金属级的奇数行，第二行定义第一金属级的偶数行。

Public/Granted literature

US20060270212A1 Method of forming bit line of flash memory device Public/Granted day:2006-11-30

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/34	...具有H01L21/06，H01L21/16及H01L21/18各组不包含的或有或无杂质，例如掺杂材料的半导体的器件
H01L21/46	....用H01L21/36至H01L21/428各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/44）
H01L21/461	.....改变半导体材料的表面物理特性或形状的，例如腐蚀、抛光、切割
H01L21/4763	......非绝缘层的沉积，例如绝缘层上的导电层、电阻层；这些层的后处理（电极的制造入H01L21/28）