Invention Grant
US07808071B2 Semiconductor device having improved oxide thickness at a shallow trench isolation edge and method of manufacture thereof
有权
在浅沟槽隔离边缘处具有改善的氧化物厚度的半导体器件及其制造方法
- Patent Title: Semiconductor device having improved oxide thickness at a shallow trench isolation edge and method of manufacture thereof
- Patent Title (中): 在浅沟槽隔离边缘处具有改善的氧化物厚度的半导体器件及其制造方法
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Application No.: US12166395Application Date: 2008-07-02
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Publication No.: US07808071B2Publication Date: 2010-10-05
- Inventor: Binghua Hu , Mindricelu P. Eugen , Damien T. Gilmore , Bill A. Wofford
- Applicant: Binghua Hu , Mindricelu P. Eugen , Damien T. Gilmore , Bill A. Wofford
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Jacqueline J. Garner; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/02
- IPC: H01L21/02
Abstract:
One aspect of a semiconductor device includes an active region located in a semiconductor substrate and having an isolation region located therebetween. The active regions have corners adjacent the isolation region. An oxide layer is located over the active regions and the corners, which may also include edges of the active regions, and a ratio of a thickness of the oxide layer over the corners to a thickness of the oxide layer over the active regions ranges from about 0.6:1 to about 0.8:1. A gate is located over the active region and the oxide layer.
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