Invention Grant
US07808847B2 Memory repair circuit and repairable pseudo-dual port static random access memory
有权
内存修复电路和可修复的伪双端口静态随机存取存储器
- Patent Title: Memory repair circuit and repairable pseudo-dual port static random access memory
- Patent Title (中): 内存修复电路和可修复的伪双端口静态随机存取存储器
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Application No.: US12344884Application Date: 2008-12-29
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Publication No.: US07808847B2Publication Date: 2010-10-05
- Inventor: Szu-Mien Wang , Dan-Chi Yang
- Applicant: Szu-Mien Wang , Dan-Chi Yang
- Applicant Address: TW Hsinchu
- Assignee: Orise Technology Co., Ltd.
- Current Assignee: Orise Technology Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Muncy, Geissler, Olds & Lowe, PLLC
- Priority: TW97127564A 20080721
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
The present invention relates to a memory repair circuit and a repairable pseudo-dual port static random access memory (pseudo-dual port SRAM). The memory repair circuit uses fewer redundant column blocks and stores a few failed block addresses to reduce the required complexity of decoding the redundant column blocks. Thus, the present invention can reduce a layout area required by redundant memory cells.
Public/Granted literature
- US20100014367A1 MEMORY REPAIR CIRCUIT AND REPAIRABLE PSEUDO-DUAL PORT STATIC RANDOM ACCESS MEMORY Public/Granted day:2010-01-21
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