Invention Grant
- Patent Title: Analog memory
- Patent Title (中): 模拟记忆
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Application No.: US11861437Application Date: 2007-09-26
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Publication No.: US07808857B2Publication Date: 2010-10-05
- Inventor: Masato Onaya , Shunsuke Serizawa
- Applicant: Masato Onaya , Shunsuke Serizawa
- Applicant Address: JP Moriguchi-shi JP Gunma
- Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee: Sanyo Electric Co., Ltd.,Sanyo Semiconductor Co., Ltd.
- Current Assignee Address: JP Moriguchi-shi JP Gunma
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2006-263209 20060927
- Main IPC: G11C8/00
- IPC: G11C8/00

Abstract:
According to a preferred embodiment of the present invention, an analog memory includes a first to third memory blocks. Each of the first to third memory blocks includes a plurality of capacitive elements for storing electric charges corresponding to an input signal, an output line for transferring the electric charges, and a plurality of MOS transistors each for changing connection between the capacitive element and the output line. When a signal is outputted from the output line to a buffer circuit by sequentially connecting the capacitive element to the output line in the first memory block, all connections between the capacitive elements and the output line are disconnected in the second and third memory blocks with the output line of the first memory block and the output line of the second memory block connected.
Public/Granted literature
- US20080074912A1 ANALOG MEMORY Public/Granted day:2008-03-27
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