Invention Grant
- Patent Title: System memory map decoder logic
- Patent Title (中): 系统内存映射解码逻辑
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Application No.: US10856539Application Date: 2004-05-27
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Publication No.: US07809861B1Publication Date: 2010-10-05
- Inventor: Jeffrey Orion Pritchard , Peter Hutkins
- Applicant: Jeffrey Orion Pritchard , Peter Hutkins
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Weaver Austin Villeneuve & Sampson LLP
- Main IPC: G06F13/14
- IPC: G06F13/14

Abstract:
Methods and apparatus are provided optimizing system memory map decoder logic. A system is configured with multiple master and slave components. Using information known about the system configuration, optimized decoder logic can be configured. Critical path delay and system resource usage are reduced by optimizing decoder logic.
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