Invention Grant
- Patent Title: Coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions
- Patent Title (中): 协调访问硬件事务内存事务和软件事务内存事务的内存位置
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Application No.: US11303529Application Date: 2005-12-15
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Publication No.: US07809903B2Publication Date: 2010-10-05
- Inventor: Ali-Reza Adl-tabatabai , Bratin Saha , Richard L. Hudson , Haitham Akkary , Ravi Rajwar
- Applicant: Ali-Reza Adl-tabatabai , Bratin Saha , Richard L. Hudson , Haitham Akkary , Ravi Rajwar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/12
- IPC: G06F12/12
Abstract:
Provided is a method, system, and program for coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions. A hardware transaction executing in hardware transactional memory initiates a request to access a memory location. A fault is returned to the hardware transaction request in response to an operation by one software transaction executing in a software transactional memory.
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