Invention Grant
US07811895B2 Method of manufacturing a semiconductor device having a stacked capacitor
有权
制造具有堆叠电容器的半导体器件的方法
- Patent Title: Method of manufacturing a semiconductor device having a stacked capacitor
- Patent Title (中): 制造具有堆叠电容器的半导体器件的方法
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Application No.: US12464209Application Date: 2009-05-12
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Publication No.: US07811895B2Publication Date: 2010-10-12
- Inventor: Shinpei Iijima
- Applicant: Shinpei Iijima
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2004-330715 20041115
- Main IPC: H01L21/20
- IPC: H01L21/20
Abstract:
A stacked capacitor in a memory cell has a bottom electrode made of a metal or metal compound, a capacitor insulation film and a top electrode made of a metal or a metal compound. The capacitor insulation film includes an aluminum oxide film having a thickness of 2 to 4 nm and in contact with the bottom electrode, and an overlying hafnium oxide film having a thickness of 3 to 6 nm. The stacked capacitor has a higher resistance against a biased temperature test.
Public/Granted literature
- US20090221127A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A STACKED CAPACITOR Public/Granted day:2009-09-03
Information query
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