Invention Grant
- Patent Title: PLL apparatus
- Patent Title (中): PLL装置
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Application No.: US12225573Application Date: 2007-03-30
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Publication No.: US07812651B2Publication Date: 2010-10-12
- Inventor: Shunichi Wakamatsu , Tsuyoshi Shiobara , Naoki Onishi
- Applicant: Shunichi Wakamatsu , Tsuyoshi Shiobara , Naoki Onishi
- Applicant Address: JP Tokyo
- Assignee: Nihon Dempa Kogyo Co., Ltd.
- Current Assignee: Nihon Dempa Kogyo Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Jordan and Hamburg LLP
- Priority: JP2006-100652 20060331
- International Application: PCT/JP2007/057686 WO 20070330
- International Announcement: WO2007/114498 WO 20071011
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
Provided is a PLL apparatus realizing extremely high frequency stability. As a concrete means for solving the problem, an A/D (analog/digital) conversion unit samples a standard signal based on 40 MHz frequency signal, which is a rectangular wave, from an oven controlled crystal oscillator (OCXO), and an orthogonal transformation unit applies orthogonal transformation to a digital signal from the A/D conversion unit to extract a real part (I) and an imaginary part (Q) which are complex expression of a phase vector equivalent to a phase difference between the standard signal and the frequency signal from the OCXO. An angular velocity of this vector is detected and a direct-current voltage according to the angular velocity is generated and supplied to the OCXO via a PWM control unit.
Public/Granted literature
- US20090167382A1 PLL Apparatus Public/Granted day:2009-07-02
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