Invention Grant
US07813161B2 Dual port SRAM with dedicated read and write ports for high speed read operation and low leakage 有权
双端口SRAM,具有专用的读写端口,用于高速读取操作和低泄漏

  • Patent Title: Dual port SRAM with dedicated read and write ports for high speed read operation and low leakage
  • Patent Title (中): 双端口SRAM,具有专用的读写端口,用于高速读取操作和低泄漏
  • Application No.: US11847119
    Application Date: 2007-08-29
  • Publication No.: US07813161B2
    Publication Date: 2010-10-12
  • Inventor: Yogesh Luthra
  • Applicant: Yogesh Luthra
  • Applicant Address: IN Greater Noida (UP)
  • Assignee: STMicroelectronics Pvt. Ltd
  • Current Assignee: STMicroelectronics Pvt. Ltd
  • Current Assignee Address: IN Greater Noida (UP)
  • Agency: Hogan Lovells US LLP
  • Priority: IN1947/DEL/2006 20060830
  • Main IPC: G11C13/00
  • IPC: G11C13/00
Dual port SRAM with dedicated read and write ports for high speed read operation and low leakage
Abstract:
A dual port static random access memory (SRAM) having dedicated read and write ports provides high speed read operation with reduced leakages. The dual port SRAM includes at least one write word line, at least one read word line, at least one pair of write bit line and read bit line, a plurality of rows and columns. Each rows and column has at least one cell which includes at least one pair of memory elements cross-coupled to form a latch for storing data, a pair of write access semiconductors and a pair of read access semiconductors. The SRAM includes an inverter circuit and a pull down circuit which are operatively coupled to the at least one cell to increase read operation performance and eliminate leakage.
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