Invention Grant
US07816261B2 MOSFETS comprising source/drain recesses with slanted sidewall surfaces, and methods for fabricating the same 有权
包括具有倾斜侧壁表面的源极/漏极凹部的MOSFET,及其制造方法

MOSFETS comprising source/drain recesses with slanted sidewall surfaces, and methods for fabricating the same
Abstract:
The present invention relates to improved metal-oxide-semiconductor field effect transistor (MOSFET) devices with stress-inducing structures located at the source and drain (S/D) regions. Specifically, each MOSFET comprises source and drain regions located in a semiconductor substrate. Such source and drain regions comprise recesses with one or more sidewall surfaces that are slanted in relation to an upper surface of the semiconductor substrate. A stress-inducing dielectric layer is located over the slanted sidewall surfaces of the recesses at the source and drain regions. Such MOSFETs can be readily formed by crystallographic etching of the semiconductor substrate to form the recesses with the slanted sidewall surfaces, followed by deposition of a stress-inducing dielectric layer thereover.
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