Invention Grant
- Patent Title: Semiconductor chip
- Patent Title (中): 半导体芯片
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Application No.: US12268904Application Date: 2008-11-11
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Publication No.: US07816708B2Publication Date: 2010-10-19
- Inventor: Masato Maede
- Applicant: Masato Maede
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-339739 20071228
- Main IPC: H01L27/118
- IPC: H01L27/118

Abstract:
In a semiconductor chip in which external connection pads are arranged in three or more rows in a staggered configuration at the peripheral portion thereof, a first pad which is arranged in the outermost row is used as a power supply pad or a ground pad for an internal core circuit. To the first pad, a second pad which is arranged in the second outermost row is connected with a metal in the same layer as a pad metal. The resistance of a power supply line to the internal core circuit has a value of the parallel resistance of a resistance from the first pad and a resistance from the second pad, which is by far lower than the resistance from the first pad. Therefore, it is possible to prevent circuit misoperation resulting from an IR drop in the power supply of the internal core circuit.
Public/Granted literature
- US20090166620A1 SEMICONDUCTOR CHIP Public/Granted day:2009-07-02
Information query
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