Invention Grant
- Patent Title: Integrated line selection apparatus within active matrix arrays
- Patent Title (中): 有源矩阵阵列内集成选线装置
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Application No.: US11590339Application Date: 2006-10-30
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Publication No.: US07817129B2Publication Date: 2010-10-19
- Inventor: Warren Jackson , Carl Taussig , Hao Luo
- Applicant: Warren Jackson , Carl Taussig , Hao Luo
- Applicant Address: US TX Houston
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Houston
- Main IPC: G09G3/36
- IPC: G09G3/36

Abstract:
An integrated line selection apparatus within active matrix arrays is described. The circuit includes multiple gate line drive transistor devices, each gate line drive transistor device having a drain coupled to a gate line of multiple gate lines in a gate line driver circuit coupled to an active matrix array and a source to receive an input signal. The circuit further includes at least one address line transistor device corresponding to each gate line transistor device, each address line transistor device having a drain coupled to a gate of the corresponding gate line drive transistor device and a gate coupled to a corresponding address line, such that by asserting a predetermined combination of voltages on the plurality of address lines, a single gate line of said plurality of gate lines is selected to receive the input signal to be transmitted to a corresponding pixel within the corresponding active matrix array.
Public/Granted literature
- US20080100559A1 Integrated line selection apparatus within active matrix arrays Public/Granted day:2008-05-01
Information query
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