Invention Grant
- Patent Title: Method and apparatus for forming multi-layered circuit pattern
- Patent Title (中): 用于形成多层电路图案的方法和装置
-
Application No.: US11447395Application Date: 2006-06-06
-
Publication No.: US07829135B2Publication Date: 2010-11-09
- Inventor: Yuji Tsuruoka , Takashi Mori , Nobuhito Yamaguchi , Masao Furukawa , Seiichi Kamiya
- Applicant: Yuji Tsuruoka , Takashi Mori , Nobuhito Yamaguchi , Masao Furukawa , Seiichi Kamiya
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Canon U.S.A., Inc., IP Division
- Priority: JP2005-181667 20050622
- Main IPC: C23C28/00
- IPC: C23C28/00
Abstract:
In the process of forming, on a substrate, a multi-layered circuit pattern with layers each having a portion made of the same material throughout the different layers in the direction in which the different layers are stacked, the position of nozzles with respect to the substrate when at least one of the layers is formed is shifted from that when the other layers are formed.
Public/Granted literature
- US20060292293A1 Method and apparatus for forming multi-layered circuit pattern Public/Granted day:2006-12-28
Information query
IPC分类:
