Invention Grant
- Patent Title: Capacitorless DRAM on bulk silicon
- Patent Title (中): 散装硅上的无电容DRAM
-
Application No.: US12421950Application Date: 2009-04-10
-
Publication No.: US07829399B2Publication Date: 2010-11-09
- Inventor: Suraj Mathew , Jigish D Trivedi
- Applicant: Suraj Mathew , Jigish D Trivedi
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Knobbe, Martens, Olson & Bear LLP
- Main IPC: H01L21/338
- IPC: H01L21/338

Abstract:
A method of forming capacitorless DRAM over localized silicon-on-insulator comprises the following steps: A silicon substrate is provided, and an array of silicon studs is defined within the silicon substrate. An insulator layer is defined atop at least a portion of the silicon substrate, and between the silicon studs. A silicon-over-insulator layer is defined surrounding the silicon studs atop the insulator layer, and a capacitorless DRAM is formed within and above the silicon-over-insulator layer.
Public/Granted literature
- US20090190394A1 CAPACITORLESS DRAM ON BULK SILICON Public/Granted day:2009-07-30
Information query
IPC分类: