A method of manufacturing a flash memory device is disclosed. A first oxide layer, a nitride layer, a second oxide layer, and a first polysilicon layer, which is a part of a polysilicon layer for a control gate, are formed to a predetermined thickness on a semiconductor substrate. A first etch process is performed to form gate patterns. An insulating layer is formed on the entire surface. A second etch process is implemented so that insulating layer spacers are formed on both sidewalls of each gate pattern while exposing the first polysilicon layer. A second polysilicon layer for the control gate is formed on the entire surface.