A gate electrode 18 formed on a silicon carbide substrate 11 includes a silicon lower layer 18A and a silicide upper layer 18B provided on the silicon lower layer 18A, the silicide upper layer 18B being made of a compound of a first metal and silicon. A source electrode 1as formed on the surface of the silicon carbide substrate 11 and in contact with an n type source region and a p+ region contains second metal silicide different from the first metal silicide. Side faces of the silicon lower layer 18A are covered with an insulator.