Invention Grant
- Patent Title: Method for manufacturing memory element
- Patent Title (中): 存储元件制造方法
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Application No.: US12050687Application Date: 2008-03-18
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Publication No.: US07829473B2Publication Date: 2010-11-09
- Inventor: Kensuke Yoshizumi
- Applicant: Kensuke Yoshizumi
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP Welsh Katz
- Priority: JP2007-078348 20070326
- Main IPC: H01L21/469
- IPC: H01L21/469

Abstract:
A first conductive layer is formed, a composition layer over the first conductive layer is formed by discharging a composition in which nanoparticles comprising a conductive material covered with an organic material are dispersed in a solvent, and the composition layer is dried. Subsequently, pretreatment is performed in which the organic material covering the nanoparticles, which are positioned on a surface of the composition layer, is decomposed, and then baking is performed. In this manner, a second conductive layer is formed by sintering nanoparticles which are positioned on a surface of the composition layer. A memory layer is formed between the first conductive layer and the second conductive layer using the nanoparticles covered with the organic materials to which the pretreatment is not performed.
Public/Granted literature
- US20080242083A1 Method for Manufacturing Memory Element Public/Granted day:2008-10-02
Information query
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