A memory structure has an access transistor connected in series with a programmable resistive element, wherein the programmable resistive element comprises on a semiconductor substrate; an insulated layer with a cavity comprising: a first layer lining the lateral surfaces and the bottom of the said cavity and impermeable to the diffusion of metal; a second layer made of porous material on the said first layer; a third layer of metallic material allowing to realize a contact electrode susceptible to spread within the said formed porous material of the second layer. Diffusion of metallic ions within the said second layer is controlled by the joint action of an electric field and temperature. A manufacturing process is also described.