Invention Grant
- Patent Title: Semiconductor memory device and write method of the same
- Patent Title (中): 半导体存储器件和写入方法相同
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Application No.: US12016431Application Date: 2008-01-18
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Publication No.: US07829933B2Publication Date: 2010-11-09
- Inventor: Kiyohito Nishihara
- Applicant: Kiyohito Nishihara
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2007-011877 20070122
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
A write and erase method of a semiconductor memory device includes a floating gate type transistor having a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a floating gate electrode formed on the gate insulating film, and a control gate electrode opposing the floating gate electrode with a hollow portion being sandwiched therebetween. A capacitance between the semiconductor substrate and the control gate electrode is controlled by one of an operation of forming, in the hollow portion, an electrical path which electrically connects the floating gate electrode and the control gate electrode, and an operation of eliminating the electrical path.
Public/Granted literature
- US20080173916A1 SEMICONDUCTOR MEMORY DEVICE AND WRITE METHOD OF THE SAME Public/Granted day:2008-07-24
Information query
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