An input/output circuit operable in input and output modes and including an input/output terminal, pull-up and pull-down output transistors, and first and second logic circuits operated in accordance with data and an enable signal. A control circuit maintains the pull-up output transistor in an inactivated state regardless of the voltage applied to the input/output terminal in the input mode. A switch circuit disconnects the first logic circuit from a power supply when an input signal having voltage higher than the power supply voltage of the power supply is input to the input/output terminal in the input mode. A back gate control circuit supplies back gates of P-channel MOS transistors in the first logic circuit and the switch circuit with back gate voltage having the same voltage as the input signal when the input signal is input in the input mode.