Invention Grant
- Patent Title: Comparator with reduced power consumption
- Patent Title (中): 比较器功耗降低
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Application No.: US12333299Application Date: 2008-12-11
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Publication No.: US07830183B2Publication Date: 2010-11-09
- Inventor: Sumantra Seth , Abhijith Arakali
- Applicant: Sumantra Seth , Abhijith Arakali
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03B1/00
- IPC: H03B1/00

Abstract:
A comparator component having a comparison circuit and bias generator circuit, with the bias generator circuit also having a same number of transistors connected in an identical configuration, as those contained in the comparison circuit to generate a comparison result based on the bias signal generated by the bias generator circuit. A transistor of the comparison circuit receiving the bias signal is connected to a corresponding transistor in the bias generator circuit, in a current mirror configuration. The same bias circuit may be shared by many comparison circuits of corresponding comparator components. The features can be extended to provide hysteresis.
Public/Granted literature
- US20100148854A1 COMPARATOR WITH REDUCED POWER CONSUMPTION Public/Granted day:2010-06-17
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