A TV signal processor is disclosed to include multiple signal receivers, a signal amplifier, a signal processor, signal decoder and a MINI-PCI interface. The TV signal processor further comprises a plurality of reserve pins arranged in a manner to meet a specification including the SVHS input signal pin, the CVBS input signal pin and the Audio input/output signal pin for inputting/outputting various audio/video signals. Thus, the use of MINI-PCI slots in the host may be effectively reduced and provide more convenience to the users.