Invention Grant
US07830957B2 Parallel bit interleaver for a wireless system 有权
用于无线系统的并行位交织器

Parallel bit interleaver for a wireless system
Abstract:
Systems and methods are provided to process wireless data packets. A method includes determining a subset of data bits to be processed at a wireless transmitter and employing a clock edge to store the data. The clock edge allows parallel mapping of at least two bits from the subset of data bits into an interleaver memory per a given clock edge. From the memory, other encoding and scrambling processes are applied before transmitting the data packets across a wireless network.
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