Invention Grant
- Patent Title: Test circuit and method for multilevel cell flash memory
- Patent Title (中): 多电平单元闪存的测试电路和方法
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Application No.: US12637365Application Date: 2009-12-14
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Publication No.: US07831872B2Publication Date: 2010-11-09
- Inventor: Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
- Applicant: Hieu Van Tran , Anh Ly , Sang Thanh Nguyen , Vishal Sarin , Hung Q. Nguyen , William John Saiki , Loc B. Hoang
- Applicant Address: US CA Sunnyvale
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
A test device and method may be used to detect voltage, current or signals of a digital multilevel memory cell system or to test operation or performance by applying inputted voltages, currents or signals to the memory cell system.
Public/Granted literature
- US20100091567A1 Test Circuit and Method for Multilevel Cell Flash Memory Public/Granted day:2010-04-15
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