Invention Grant
US07831889B2 Method and device for error detection for a cache memory and corresponding cache memory
有权
用于高速缓冲存储器和对应高速缓冲存储器的错误检测的方法和装置
- Patent Title: Method and device for error detection for a cache memory and corresponding cache memory
- Patent Title (中): 用于高速缓冲存储器和对应高速缓冲存储器的错误检测的方法和装置
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Application No.: US10561634Application Date: 2004-06-18
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Publication No.: US07831889B2Publication Date: 2010-11-09
- Inventor: Reinhard Weiberle , Bernd Mueller , Thomas Kottke
- Applicant: Reinhard Weiberle , Bernd Mueller , Thomas Kottke
- Applicant Address: DE Stuttgart
- Assignee: Robert Bosch GmbH
- Current Assignee: Robert Bosch GmbH
- Current Assignee Address: DE Stuttgart
- Agency: Kenyon & Kenyon LLP
- Priority: DE10327549 20030618
- International Application: PCT/DE2004/001234 WO 20040618
- International Announcement: WO2004/114135 WO 20041229
- Main IPC: G11C29/00
- IPC: G11C29/00
Abstract:
A method for error detection in a cache memory for storing data, the access to the data stored in the cache memory taking place by addresses assigned to them, wherein for the addresses assigned to the stored data, at least one first test signature made up of at least one first signature bit is generated and also stored in the cache memory.
Public/Granted literature
- US20070271485A1 Method and Device for Error Detection for a Cache Memory and Corresponding Cache Memory Public/Granted day:2007-11-22
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