Invention Grant
US07831937B2 Method and system for reduction of XOR/XNOR subexpressions in structural design representations
有权
在结构设计表示中减少XOR / XNOR子表达式的方法和系统
- Patent Title: Method and system for reduction of XOR/XNOR subexpressions in structural design representations
- Patent Title (中): 在结构设计表示中减少XOR / XNOR子表达式的方法和系统
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Application No.: US11955112Application Date: 2007-12-12
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Publication No.: US07831937B2Publication Date: 2010-11-09
- Inventor: Jason Raymond Baumgartner , Robert Lowell Kanzelman , Hari Mony , Viresh Paruthi
- Applicant: Jason Raymond Baumgartner , Robert Lowell Kanzelman , Hari Mony , Viresh Paruthi
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Dillon & Yudell LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method, system and computer program product for reducing XOR/XNOR subexpressions in structural design representations are disclosed. The method includes receiving an initial design, in which the initial design represents an electronic circuit containing an XOR gate. A first simplification mode for the initial design is selected from a set of applicable simplification modes, wherein the first simplification mode is an XOR/XNOR simplification mode, and a simplification of the initial design is performed according to the first simplification mode to generate a reduced design containing a reduced number of XOR gates. Whether a size of the reduced design is less than a size of the initial design is determined, and, in response to determining that the size of the reduced design is less than a the size of the initial design, the initial design is replaced with the reduced design.
Public/Granted literature
- US20080092091A1 Method and system for reduction of XOR/XNOR subexpressions in structural design representations Public/Granted day:2008-04-17
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