Invention Grant
- Patent Title: Method of manufacturing a semiconductor device
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Application No.: US11978586Application Date: 2007-10-30
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Publication No.: US07834398B2Publication Date: 2010-11-16
- Inventor: Shunpei Yamazaki
- Applicant: Shunpei Yamazaki
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP10-174482 19980622
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/94

Abstract:
There is provided a method of removing trap levels and defects, which are caused by stress, from a single crystal silicon thin film formed by an SOI technique. First, a single crystal silicon film is formed by using a typical bonding SOI technique such as Smart-Cut or ELTRAN. Next, the single crystal silicon thin film is patterned to form an island-like silicon layer, and then, a thermal oxidation treatment is carried out in an oxidizing atmosphere containing a halogen element, so that an island-like silicon layer in which the trap levels and the defects are removed is obtained.
Public/Granted literature
- US20080067597A1 Method of manufacturing a semiconductor device Public/Granted day:2008-03-20
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