Invention Grant
- Patent Title: Block interleaving with memory table of reduced size
- Patent Title (中): 使用缩小尺寸的内存表进行块交错
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Application No.: US11815883Application Date: 2006-02-03
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Publication No.: US07840859B2Publication Date: 2010-11-23
- Inventor: Bram Van Den Bosch
- Applicant: Bram Van Den Bosch
- Applicant Address: NL Eindhoven
- Assignee: Koninklijke Philips Electronics N.V.
- Current Assignee: Koninklijke Philips Electronics N.V.
- Current Assignee Address: NL Eindhoven
- Priority: EP05101058 20050214
- International Application: PCT/IB2006/050365 WO 20060203
- International Announcement: WO2006/085251 WO 20060817
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
Interleaving improves noise rejection in digital communication and storage systems. According a known scheme, the interleaving/deinterleaving is achieved by storing symbols in a temporary memory table of R rows×C columns in a row by row order, and reading them in a column by column order, or vice versa, so obtaining a rearranged order. Methods and devices for interleaving and deinterleaving are proposed which accomplish the same interleaving/deinterleaving operation with a reduced size of the temporary memory table. The rearrangement of the symbols according to the rearranged order is accomplished by using a table with a reduced memory size, in combination with the order with which the symbols are fetched from or stored in a further memory. The invention further relates to ICs and apparatuses for interleaving and/or deinterleaving.
Public/Granted literature
- US20080270714A1 Block Interleaving with Memory Table of Reduced Size Public/Granted day:2008-10-30
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