Invention Grant
US07842997B2 Nonvolatile memory device having cell and peripheral regions and method of making the same
有权
具有单元和外围区域的非易失性存储器件及其制造方法
- Patent Title: Nonvolatile memory device having cell and peripheral regions and method of making the same
- Patent Title (中): 具有单元和外围区域的非易失性存储器件及其制造方法
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Application No.: US12078143Application Date: 2008-03-27
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Publication No.: US07842997B2Publication Date: 2010-11-30
- Inventor: Ju-Hyung Kim , Jung-Dal Choi , Jang-Hyun You
- Applicant: Ju-Hyung Kim , Jung-Dal Choi , Jang-Hyun You
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2007-0030468 20070328
- Main IPC: H01L27/115
- IPC: H01L27/115 ; H01L21/8247

Abstract:
A nonvolatile memory device and method of making the same are provided. Memory cells may be provided in a cell area wherein each memory cell has an insulative structure including a tunnel insulating layer, a floating trap layer and a blocking layer, and a conductive structure including an energy barrier layer, a barrier metal layer and a low resistance gate electrode. A material having a lower resistivity may be used as the gate electrode so as to avoid problems associated with increased resistance and to allow the gate electrode to be made relatively thin. The memory device may further include transistors in the peripheral area, which may have a gate dielectric layer, a lower gate electrode of poly-silicon and an upper gate electrode made of metal silicide, allowing an improved interface with the lower gate electrode without diffusion or reaction while providing a lower resistance.
Public/Granted literature
- US20080237700A1 Nonvolatile memory device having cell and peripheral regions and method of making the same Public/Granted day:2008-10-02
Information query
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