Invention Grant
- Patent Title: Multilayer printed circuit board
- Patent Title (中): 多层印刷电路板
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Application No.: US12350117Application Date: 2009-01-07
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Publication No.: US07843703B2Publication Date: 2010-11-30
- Inventor: Motochika Okano
- Applicant: Motochika Okano
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Priority: JP2008-145181 20080602
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H05K1/14

Abstract:
According to one embodiment, a multilayer printed circuit board having a plurality of wiring layers and an electronic component mounted thereon, includes a spiral wire including a path in a substantial spiral shape configured with a printed wire section of a substantial loop shape provided on each of at least two wiring layers of the plurality of wiring layers, and a plug provided on each wiring layer arranged between a top wiring layer which is a wiring layer on a top on which the printed wire section of a substantial loop shape is provided and a bottom wiring layer which is a wiring layer on a bottom on which the printed wire section of a substantial loop shape is provided.
Public/Granted literature
- US20090296362A1 Multilayer Printed Circuit Board, and Design Method of Multilayer Printed Circuit Board Public/Granted day:2009-12-03
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