Invention Grant
- Patent Title: Semiconductor integrated circuit device and inspection method therefor
- Patent Title (中): 半导体集成电路器件及其检测方法
-
Application No.: US11704370Application Date: 2007-02-09
-
Publication No.: US07844874B2Publication Date: 2010-11-30
- Inventor: Nobuyuki Moriwaki , Takehiro Hirai
- Applicant: Nobuyuki Moriwaki , Takehiro Hirai
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2006-032299 20060209
- Main IPC: G06F11/00
- IPC: G06F11/00

Abstract:
A semiconductor integrated circuit device includes: a plurality of devices under test formed on a substrate; a selection circuit formed on the substrate which selects two of the plurality of devices under test; a magnitude comparison circuit formed on the substrate which measures an electrical characteristic of the two selected devices under test and makes a magnitude comparison between values of the measured electrical characteristic; an address memory circuit formed on the substrate which stores addresses of the two devices under test between which the magnitude comparison has been made; and a control circuit formed on the substrate and connected to the selection circuit, the magnitude comparison circuit, and the address memory circuit.
Public/Granted literature
- US20070234168A1 Semiconductor integrated circuit device and inspection method therefor Public/Granted day:2007-10-04
Information query