Invention Grant
US07846843B2 Method for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern
有权
使用间隔物作为形成精细图案的蚀刻掩模来制造半导体器件的方法
- Patent Title: Method for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern
- Patent Title (中): 使用间隔物作为形成精细图案的蚀刻掩模来制造半导体器件的方法
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Application No.: US11939215Application Date: 2007-11-13
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Publication No.: US07846843B2Publication Date: 2010-12-07
- Inventor: Chai O Chung , Jong Min Lee , Chan Bae Kim , Hyeon Ju An , Hyo Seok Lee , Sung Kyu Min
- Applicant: Chai O Chung , Jong Min Lee , Chan Bae Kim , Hyeon Ju An , Hyo Seok Lee , Sung Kyu Min
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0065489 20070629
- Main IPC: H01L21/311
- IPC: H01L21/311

Abstract:
A process for manufacturing a semiconductor device using a spacer as an etch mask for forming a fine pattern is described. The process includes forming a hard mask layer over a target layer that is desired to be etched. A sacrificial layer pattern is subsequently formed over the hard mask layer. Spacers are formed on the sidewalls of the sacrificial layer pattern. The protective layer is formed on the hard mask layer portions between the sacrificial patterns formed with the spacer. The sacrificial layer pattern and the protective layer are then later removed, respectively. The hard mask layer is etched using the spacer as an etching mask. After etching, the spacer is removed. Finally, the target layer is etched using the etched hard mask as an etching mask.
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