Invention Grant
US07846851B2 Method and apparatus for a two-step resist soft bake to prevent ILD outgassing during semiconductor processing
有权
用于两步抗蚀剂软烘烤的方法和装置,以防止半导体加工过程中的ILD脱气
- Patent Title: Method and apparatus for a two-step resist soft bake to prevent ILD outgassing during semiconductor processing
- Patent Title (中): 用于两步抗蚀剂软烘烤的方法和装置,以防止半导体加工过程中的ILD脱气
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Application No.: US10765481Application Date: 2004-01-27
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Publication No.: US07846851B2Publication Date: 2010-12-07
- Inventor: Paul Shirley , Gordon Haller
- Applicant: Paul Shirley , Gordon Haller
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor wafer having no photoresist craters at the completion of a two-step post-apply resist bake (soft bake) in the fabrication of an integrated circuit. A process and method for soft baking the semiconductor wafer so that photoresist layers are free of surface voids or craters. The semiconductor wafer is coated with resist and then baked at both a low-bake temperature and a high-bake temperature. It is theorized that the lower temperature bake either hardens the resist layer before trapped air expands through the resist or displaces the trapped air while the resist layer remains fluid and returns to its conformal shape.
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