Invention Grant
- Patent Title: Lightweight and compact through-silicon via stack package with excellent electrical connections and method for manufacturing the same
- Patent Title (中): 通过堆叠封装的轻巧紧凑的硅通过优良的电气连接及其制造方法
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Application No.: US11869052Application Date: 2007-10-09
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Publication No.: US07847379B2Publication Date: 2010-12-07
- Inventor: Qwan Ho Chung
- Applicant: Qwan Ho Chung
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2007-0063173 20070626
- Main IPC: H01L23/02
- IPC: H01L23/02

Abstract:
A through-silicon via stack package contains package units. Each package unit includes a semiconductor chip; a through-silicon via formed in the semiconductor chip; a first metal line formed on an upper surface and contacting a portion of a top surface of the through-silicon via; and a second metal line formed on a lower surface of the semiconductor chip and contacting a second portion of a lower surface of the through-silicon via. When package units are stacked, the second metal line formed on the lower surface of the top package unit and the first metal line formed on the upper surface of the bottom package unit are brought into contact with the upper surface of the through-silicon via of the bottom package unit and the lower surface of the through-silicon via of the top package unit, respectively. The stack package is lightweight and compact, and can form excellent electrical connections.
Public/Granted literature
Information query
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