Invention Grant
US07848155B2 Non-volatile memory system including spare array and method of erasing a block in the same
有权
包括备用阵列的非易失性存储器系统和擦除其中的块的方法
- Patent Title: Non-volatile memory system including spare array and method of erasing a block in the same
- Patent Title (中): 包括备用阵列的非易失性存储器系统和擦除其中的块的方法
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Application No.: US12165861Application Date: 2008-07-01
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Publication No.: US07848155B2Publication Date: 2010-12-07
- Inventor: Doo Gon Kim , Ki Tae Park , Yeong Taek Lee
- Applicant: Doo Gon Kim , Ki Tae Park , Yeong Taek Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel Sibley & Sajovec
- Priority: KR10-2007-0066076 20070702
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04

Abstract:
Methods of operating non-volatile memory devices can compensate for threshold voltage disturbances caused by overhead data programming during block erase operations. These methods include erasing a spare array of nonvolatile memory cells and a corresponding main array of nonvolatile memory cells that shares word lines with the spare array. This erasing operation is followed by writing updated overhead data (e.g., an erase count) into the spare array and then performing a soft program operation. This soft program operation is performed on at least a first portion of the main array to thereby narrow a threshold voltage distribution of erased memory cells within the first portion of the main array. The soft program operation is then followed by an operation to verify an erased status of at least the first portion of the main array and an operation to communicate that the main and spare arrays of nonvolatile memory cells have been properly erased to a memory controller.
Public/Granted literature
- US20090010073A1 Non-Volatile Memory System Including Spare Array and Method of Erasing a Block in the Same Public/Granted day:2009-01-08
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