Invention Grant
US07851846B2 Non-volatile memory cell with buried select gate, and method of making same
有权
具有埋选择栅极的非易失性存储单元及其制造方法
- Patent Title: Non-volatile memory cell with buried select gate, and method of making same
- Patent Title (中): 具有埋选择栅极的非易失性存储单元及其制造方法
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Application No.: US12327114Application Date: 2008-12-03
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Publication No.: US07851846B2Publication Date: 2010-12-14
- Inventor: Nhan Do , Hieu V. Tran , Amitay Levi
- Applicant: Nhan Do , Hieu V. Tran , Amitay Levi
- Applicant Address: US CA Sunnyvale
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agency: DLA Piper LLP (US)
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L21/28
Abstract:
A memory device, and method of making the same, in which a trench is formed into the surface of a semiconductor substrate. Source and drain regions define a channel region there between. The drain is formed under the trench. The channel region includes a first portion that extends along a bottom wall of the trench, a second portion that extends along a sidewall of the trench, and a third portion that extends along the surface of the substrate. The floating gate is disposed over the channel region third portion. The control gate is disposed over the floating gate. The select gate is at least partially disposed in the trench and adjacent to the channel region first and second portions. The erase gate disposed adjacent to and insulated from the floating gate.
Public/Granted literature
- US20100133602A1 NON-VOLATILE MEMORY CELL WITH BURIED SELECT GATE, AND METHOD OF MAKING SAME Public/Granted day:2010-06-03
Information query
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