Invention Grant
- Patent Title: Over approximation of integrated circuit based clock gating logic
- Patent Title (中): 基于集成电路的时钟门控逻辑的近似
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Application No.: US11836160Application Date: 2007-08-09
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Publication No.: US07853907B2Publication Date: 2010-12-14
- Inventor: Israel Berger , Cynthia Rae Eisner , Alexander Itskovich , Dan Ramon
- Applicant: Israel Berger , Cynthia Rae Eisner , Alexander Itskovich , Dan Ramon
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A novel method for optimizing the implementation of clock gating logic in digital circuits utilizing clock gating. The method over-approximates the clock gating function by removing the variable with the least influence on the resulting approximation function. Approximations of clock gating functions expressed in normal form are performed by removing an appropriate component from the function. Approximations of clock gating functions expressed in conjunctive normal form are performed by removing a clause from the function. Approximations of clock gating functions expressed in disjunctive normal form are performed by removing a literal from a clause in the function.
Public/Granted literature
- US20090044154A1 OVER APPROXIMATION OF INTEGRATED CIRCUIT BASED CLOCK GATING LOGIC Public/Granted day:2009-02-12
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