Invention Grant
US07855136B2 Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps
有权
使用焊锡凸块和虚拟凸块将半导体芯片安装到电路基板的方法
- Patent Title: Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps
- Patent Title (中): 使用焊锡凸块和虚拟凸块将半导体芯片安装到电路基板的方法
-
Application No.: US12007933Application Date: 2008-01-17
-
Publication No.: US07855136B2Publication Date: 2010-12-21
- Inventor: Hidenobu Takahira
- Applicant: Hidenobu Takahira
- Applicant Address: JP Tokyo
- Assignee: FujifilmCorporation
- Current Assignee: FujifilmCorporation
- Current Assignee Address: JP Tokyo
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: JP2005-036231 20050214
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A semiconductor chip comprises a silicon substrate on which semiconductor elements are formed, pads, each of which is formed on the silicon substrate and electrically connected to at least one of the semiconductor elements, a first insulating layer having an opening over each one of the pads, a first wiring layer formed on the first insulating layer, electrically connected to the pads and having connecting parts, a second insulating layer formed on the first wiring layer and having openings over the connecting parts of the first wiring layer, electrically functioning solder bumps, each of which is formed on one of the openings of the second insulating layer with electrically connecting to one of the pads via the first wiring layer, and dummy bumps for self adjustment, each of which is formed on one of the openings of the second insulating layer without electrically connecting to the pad.
Public/Granted literature
- US20080124837A1 Method of mounting semiconductor chip to circuit substrate using solder bumps and dummy bumps Public/Granted day:2008-05-29
Information query
IPC分类:
