Invention Grant
- Patent Title: Semiconductor device having multiple wiring layers and method of producing the same
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Application No.: US12501839Application Date: 2009-07-13
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Publication No.: US07855141B2Publication Date: 2010-12-21
- Inventor: Yoshiaki Shimooka , Hideki Shibata , Hideshi Miyajima , Kazuhiro Tomioka
- Applicant: Yoshiaki Shimooka , Hideki Shibata , Hideshi Miyajima , Kazuhiro Tomioka
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2001-177005 20010612
- Main IPC: H01L21/4763
- IPC: H01L21/4763
Abstract:
A method of producing a semiconductor device having a plurality of wiring layers forms a first interlayer-insulating film, forms a plurality of grooves for wiring in the first interlayer-insulating film, fills metallic films in the grooves to form wirings, etches the first interlayer-insulating film with the wirings as a mask and removes the interlayer-insulating film between the wirings to provide grooves to be filled, and fills a second interlayer-insulating film made of a material of low dielectric constant in the grooves to be filled.
Public/Granted literature
- US20090280642A1 SEMICONDUCTOR DEVICE HAVING MULTIPLE WIRING LAYERS AND METHOD OF PRODUCING THE SAME Public/Granted day:2009-11-12
Information query
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