Invention Grant
US07855417B2 Non-volatile memory with a stable threshold voltage on SOI substrate
有权
在SOI衬底上具有稳定阈值电压的非易失性存储器
- Patent Title: Non-volatile memory with a stable threshold voltage on SOI substrate
- Patent Title (中): 在SOI衬底上具有稳定阈值电压的非易失性存储器
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Application No.: US11833235Application Date: 2007-08-03
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Publication No.: US07855417B2Publication Date: 2010-12-21
- Inventor: Hsin-Ming Chen , Hai-Ming Lee , Shih-Jye Shen , Ching-Hsiang Hsu
- Applicant: Hsin-Ming Chen , Hai-Ming Lee , Shih-Jye Shen , Ching-Hsiang Hsu
- Applicant Address: TW Hsinchu
- Assignee: eMemory Technology Inc.
- Current Assignee: eMemory Technology Inc.
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Main IPC: H01L29/786
- IPC: H01L29/786 ; H01L29/792

Abstract:
A non-volatile memory disposed in a SOI substrate is provided. The non-volatile memory includes a memory cell and a first conductive type doped region. The memory cell includes a gate, a charge storage structure, a bottom dielectric layer, a second conductive type drain region, and a second conductive type source region. The gate is disposed on the SOI substrate. The charge storage structure is disposed between the gate and the SOI substrate. The bottom dielectric layer is disposed between the charge storage layer and the SOI substrate. The second conductive type drain region and the second conductive type source region are disposed in a first conductive type silicon body layer next to the two sides of the gate. The first conductive type doped region is disposed in the first conductive type silicon body layer and electrically connected to the conductive type silicon body layer beneath the gate.
Public/Granted literature
- US20080031038A1 NON-VOLATILE MEMORY AND OPERATING METHOD THEREOF Public/Granted day:2008-02-07
Information query
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