Invention Grant
- Patent Title: Differential amplification circuit
- Patent Title (中): 差分放大电路
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Application No.: US12285598Application Date: 2008-10-09
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Publication No.: US07859339B2Publication Date: 2010-12-28
- Inventor: Akira Ide
- Applicant: Akira Ide
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP2007-264532 20071010
- Main IPC: H03F3/45
- IPC: H03F3/45

Abstract:
A differential amplification circuit is constituted of a differential transistor pair including a pair of n-channel MOS transistors whose sources are connected together, a constant current source circuit which is connected to the sources of the differential transistor pair, a current-mirror load circuit including a pair of p-channel MOS transistors whose gates are connected together, and a bias generation circuit which generates a gate bias voltage and a drain bias voltage applied to the current-mirror load circuit in such a way that the same potential is set to both the drains of the p-channel MOS transistors. Thus, it is possible to reduce the input offset voltage without reducing the margin of operation voltage and without increasing the overall chip size.
Public/Granted literature
- US20090096523A1 Differential amplification circuit Public/Granted day:2009-04-16
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