An array substrate includes a base substrate and a plurality of pixels on the base substrate. Each pixel includes a data line, first and second gate lines, first to third switching devices, and first and second pixel electrodes. The first and second gate lines cross the data line, and the second gate line is spaced apart from the first gate line. The first switching device is electrically connected to an adjacent gate line corresponding to an adjacent pixel. The second switching device is electrically connected to the data line and the first gate line. The third switching device is electrically connected to the data line and the second gate line. The first pixel electrode is electrically connected to the first and second switching devices, and the second pixel electrode is electrically connected to the first and third switching devices. The second pixel electrode is spaced apart from the first pixel electrode.