Method for integrating SiGe NPN and vertical PNP devices

Invention Grant

US07863148B2 Method for integrating SiGe NPN and vertical PNP devices 有权

Title translation: SiGe NPN和垂直PNP器件的集成方法

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Patent Title: Method for integrating SiGe NPN and vertical PNP devices
Patent Title (中): SiGe NPN和垂直PNP器件的集成方法
Application No.: US12384937

Application Date: 2009-04-10
Publication No.: US07863148B2

Publication Date: 2011-01-04
Inventor: Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M Kalburge
Applicant: Paul D. Hurwitz , Kenneth M. Ring , Chun Hu , Amol M Kalburge
Applicant Address: US CA Newport Beach
Assignee: Newport Fab, LLC
Current Assignee: Newport Fab, LLC
Current Assignee Address: US CA Newport Beach
Agency: Farjami & Farjami LLP
Main IPC: H01L21/8228
IPC: H01L21/8228 ; H01L21/331 ; H01L21/8222 ; H01L21/8238

Method for integrating SiGe NPN and vertical PNP devices

Abstract:

According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the substrate. The method further comprises forming a buffer layer on the insulating layer and forming an opening in the buffer layer and the insulating layer in the NPN region, where the opening exposes the substrate. The method further comprises forming a semiconductor layer on the buffer layer and in the opening in the NPN region, where the semiconductor layer has a first portion situated in the opening and a second portion situated on the buffer layer in the PNP region. The first portion of the semiconductor layer forms a single crystal base of the NPN device and the second portion of the semiconductor layer forms a polycrystalline emitter of the vertical PNP device.

Abstract(Chinese):

根据一个示例性实施例，在衬底上形成NPN和垂直PNP器件的方法包括在衬底的NPN区域和PNP区域上形成绝缘层。该方法还包括在绝缘层上形成缓冲层，并在NPN区域中的缓冲层和绝缘层中形成开口，其中开口露出基板。所述方法还包括在所述NPN区域中的所述缓冲层和所述开口中形成半导体层，其中所述半导体层具有位于所述开口中的第一部分和位于所述PNP区域中的所述缓冲层上的第二部分。半导体层的第一部分形成NPN器件的单晶基底，半导体层的第二部分形成垂直PNP器件的多晶发射极。

Public/Granted literature

US20090203183A1 Method for integrating SIGE NPN and Vertical PNP Devices Public/Granted day:2009-08-13

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8222	......双极工艺
H01L21/8228	.......互补器件，例如互补晶体管