Invention Grant
- Patent Title: Zero interface polysilicon to polysilicon gate for flash memory
- Patent Title (中): 零接口多晶硅到多晶硅栅极用于闪存
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Application No.: US11614801Application Date: 2006-12-21
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Publication No.: US07863175B2Publication Date: 2011-01-04
- Inventor: Robert Bertram Ogle , Joong Jeon , Eric Paton , Austin Frenkel
- Applicant: Robert Bertram Ogle , Joong Jeon , Eric Paton , Austin Frenkel
- Applicant Address: US CA Sunnyvale US KY Grand Cayman
- Assignee: Spansion LLC,Globalfoundries Inc.
- Current Assignee: Spansion LLC,Globalfoundries Inc.
- Current Assignee Address: US CA Sunnyvale US KY Grand Cayman
- Agency: Turocy & Watson, LLP
- Main IPC: H01L21/8247
- IPC: H01L21/8247 ; H01L29/788

Abstract:
A system and method are disclosed for processing a zero angstrom oxide interface dual poly gate structure for a flash memory device. An exemplary method can include removing an oxide on a surface of a first poly layer and forming a second poly layer on the first poly layer in a same processing chamber. A transfer of the structure is not needed from an oxide removal tool to, for example, a poly layer formation tool, an implant tool, and the like. As a result, impurities containing a silicon oxide caused by exposure of the first poly layer to an oxygen-containing atmosphere do not form at the interface of the first and second poly layers.
Public/Granted literature
- US20080149986A1 ZERO INTERFACE POLYSILICON TO POLYSILICON GATE FOR FLASH MEMORY Public/Granted day:2008-06-26
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