Invention Grant
- Patent Title: Low-resistance interconnects and methods of making same
- Patent Title (中): 低电阻互连及其制作方法
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Application No.: US12119994Application Date: 2008-05-13
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Publication No.: US07863176B2Publication Date: 2011-01-04
- Inventor: Jaydeb Goswami , Allen McTeer
- Applicant: Jaydeb Goswami , Allen McTeer
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agent Fletcher Yoder
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
Devices and methods for providing low-resistance interconnects in a semiconductor device are provided. Specifically, one or more embodiments of the present invention relate to disposing a conductive material in a trench without disposing a resistive barrier material between the conductive material and the sidewalls of the trench so that the conductive material takes up the full width of the trench. For example, the trench may be disposed over one or more contacts made of a barrier material such as titanium nitride that also acts as a seed, and the conductive material may be grown on top of the titanium nitride to fill the trench.
Public/Granted literature
- US20090283907A1 LOW-RESISTANCE INTERCONNECTS AND METHODS OF MAKING SAME Public/Granted day:2009-11-19
Information query
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