Invention Grant
- Patent Title: Method for manufacturing a device having a high aspect ratio via
- Patent Title (中): 制造具有高纵横比的装置的方法
-
Application No.: US12170138Application Date: 2008-07-09
-
Publication No.: US07863181B2Publication Date: 2011-01-04
- Inventor: Hsueh An Yang , Po Jen Cheng
- Applicant: Hsueh An Yang , Po Jen Cheng
- Applicant Address: TW Pingtung
- Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee: Advanced Semiconductor Engineering, Inc.
- Current Assignee Address: TW Pingtung
- Priority: TW96130401A 20070817
- Main IPC: H01L21/4763
- IPC: H01L21/4763
Abstract:
Method for manufacturing a device having a conductive via includes the following steps. A dielectric material layer including a through hole is formed on a substrate. A seed metallic layer is formed on the dielectric material layer and in the through hole. A metallic layer is formed on the seed metallic layer, and is filled in the through hole. The metallic layer located over the seed metallic layer and outside the through hole is etched by a spin etching process, whereby the metallic layer located in the through hole is formed to a lower portion. An upper portion is formed on the lower portion, and a metallic trace is formed on the seed metallic layer, wherein the upper and lower portions is formed to a conductive via, and the conductive via and the metallic trace expose a part of the seed metallic layer. The exposed seed metallic layer is etched.
Public/Granted literature
- US20090047782A1 METHOD FOR MANUFACTURING A DEVICE HAVING A HIGH ASPECT RATIO VIA Public/Granted day:2009-02-19
Information query
IPC分类:
