Invention Grant
US07863888B2 Efficient switching architecture with reduced stub lengths 有权
有效的交换架构减少了短截线长度

  • Patent Title: Efficient switching architecture with reduced stub lengths
  • Patent Title (中): 有效的交换架构减少了短截线长度
  • Application No.: US11191198
    Application Date: 2005-07-27
  • Publication No.: US07863888B2
    Publication Date: 2011-01-04
  • Inventor: Fang Xu
  • Applicant: Fang Xu
  • Applicant Address: US MA North Reading
  • Assignee: Teradyne, Inc.
  • Current Assignee: Teradyne, Inc.
  • Current Assignee Address: US MA North Reading
  • Agent Bruce D. Rubenstein
  • Main IPC: H03K17/00
  • IPC: H03K17/00 H04M3/00
Efficient switching architecture with reduced stub lengths
Abstract:
A switching topology for communicating signals in an automatic test system includes a plurality of switching circuits each for selectively passing signals or crossing signals. Switching circuits are connected together such that each node of any switching circuit connects to no more than one node of any other switching circuit. This topology offers improved signal integrity, reduced cost, and reduced space as compared with conventional, matrix-style switching topologies.
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