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US07863962B2 High voltage CMOS output buffer constructed from low voltage CMOS transistors 有权
由低压CMOS晶体管构成的高压CMOS输出缓冲器

High voltage CMOS output buffer constructed from low voltage CMOS transistors
Abstract:
A high voltage CMOS output buffer is constructed from low voltage CMOS transistors. The output buffer employs a series of unique CMOS inverter stages, each of which contains a switched PMOS transistor, one or more voltage drop blocks, and a switched NMOS transistor. The voltage drop blocks are composed of stacked PMOS transistors that are diode-connected—i.e., the PMOS gate terminal is connected to the PMOS drain terminal, and the PMOS body (N-well) terminal is connected to the PMOS source terminal. The diode-connected PMOS transistors reduce the voltage across the transistor gate oxide to a safe value, for all internal PMOS/NMOS transistors inside the CMOS output buffer.
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