Invention Grant
- Patent Title: Non-volatile multilevel memory cell programming
- Patent Title (中): 非易失性多层存储器单元编程
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Application No.: US12571518Application Date: 2009-10-01
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Publication No.: US07864575B2Publication Date: 2011-01-04
- Inventor: Seiichi Aritome
- Applicant: Seiichi Aritome
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron, Huebsch, PLLC
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
Embodiments of the present disclosure provide methods, devices, modules, and systems for programming an array of non-volatile multilevel memory cells to a number of threshold voltage ranges. One method includes programming a lower page of a first wordline cell to increase a threshold voltage (Vt) of the first wordline cell to a first Vt within a lowermost Vt range. The method includes programming a lower page of a second wordline cell prior to programming an upper page of the first wordline cell. The method includes programming the upper page of the first wordline cell such that the first Vt is increased to a second Vt, wherein the second Vt is within a Vt range which is then a lowermost Vt range and is positive.
Public/Granted literature
- US20100020605A1 NON-VOLATILE MULTILEVEL MEMORY CELL PROGRAMMING Public/Granted day:2010-01-28
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